Building the functional performance model of a processor

In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. The procedure tries to minimize the experimental time used for building the speed function approximation. We demonstrate the efficiency of our procedure by performing experiments with a matrix multiplication application and a Cholesky Factorization application that use memory hierarchy efficiently and a matrix multiplication application that uses memory hierarchy inefficiently on a local network of heterogeneous computers. Categories and Subject Descriptors B.8.2 [Hardware]: Performance and Reliability – Performance Analysis and Design Aids; C.4 [Computer Systems Organization]: Performance of Systems – Measurement Techniques, Modeling Techniques, Performance Attributes; I.6.3 [Computing Methodologies]: Simulation and Modeling – Applications; I.6.5 [Computing Methodologies]: Simulation and Modeling – Mod...

• Type: Conference
• Year: 2006
• Where: SAC
• Authors: Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
• Keywords: Applied Computing, Function Approximation, Matrix Multiplication Application, Memory Hierarchy, SAC 2006