Sciweavers

DAC
2012
ACM

Assessing the performance limits of parallelized near-threshold computing

12 years 2 months ago
Assessing the performance limits of parallelized near-threshold computing
Supply voltage scaling has stagnated in recent technology nodes, leading to so-called “dark silicon.” In this paper, we investigate the limit of voltage scaling together with task parallelization to maintain task completion latency. When accounting for parallelization overheads, minimum task energy is obtained at “near threshold” supply-voltages across 6 commercial technology nodes and provides 4X improvement in overall CMP performance. Categories and Subject Descriptors B.8.0 [Hardware]: Performance and Reliability – general. General Terms Performance, Design. Keywords Near-Threshold Computing, low-power design, parallelization.
Nathaniel Ross Pinckney, Korey Sewell, Ronald G. D
Added 29 Sep 2012
Updated 29 Sep 2012
Type Journal
Year 2012
Where DAC
Authors Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David Blaauw
Comments (0)