Automatic Creation of Domain-Specific Reconfigurable CPLDs for SoC

Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurability, or even be used for post-fabrication modifications. Also, by catering the logic to the SoC domain, additional area and delay gains can be achieved over current, more general reconfigurable fabrics. This paper presents tools that automate the creation of domainspecific CPLDs for SoC, including an Architecture Generator for finding appropriate architectures and a Layout Generator for creating efficient layouts. By tailoring CPLDs to the domains that they are supporting, we provide results that beat representative fixed architectures by 5.6x to

• Type: Conference
• Year: 2005
• Where: FPL
• Authors: Mark Holland, Scott Hauck
• Keywords: FPL 2005, General Computing Ability, General Reconfigurable Fabrics, Many System-on-a-Chip Devices