The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their generic counterparts and therefore use the FPGAs resources more efficiently. However, when the problem at hand changes, two overheads are introduced: generating the new configuration and reconfiguring the FPGA. Many authors have tried to reduce these overheads with various success. The most successful implementations are hand designs for one specific application. The methods used in these implementations are hard to port to other applications, which results in a big design cost. To make runtime reconfiguration feasible in commercial designs, automated design methods are needed. In this paper, we describe a tool flow that automatically maps an application to a self-reconfiguring platform. This platform contains a configuration manager, responsible for the reconfiguration and an FPGA. In our case the Power PC (P...