Background memory management for dynamic data structure intensive processing systems

Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently available hardware synthesis environments typically do not support dynamic data structure concepts and their associated memory synthesis problems. In this paper we address the background memory management task in a hardware design trajectory, which includes allocation of a distributed memory architecture, assignment and mapping act data structures to memories, and synthesis of dynamic management behavior. With this approach to explore for the optimal memory architecture, the design entry point is lifted to a higher level than currently used for behavioral synthesis, as the specification can be a high-level program using data abstraction. The power of our approach will be substantiated on an industrial highperformance telecommunication ASIC design.

• Type: Conference
• Year: 1995
• Where: ICCAD
• Authors: Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wuytack, Francky Catthoor
• Keywords: Associated Memory Synthesis, Data Structures, Hardware, ICCAD 1995, Memory Architecture