Biasing techniques for subthreshold MOS resistive grids

— A classic resistive network implemented using MOS transistors suffers from non-linearity in the subthreshold exponential parameter κ that arises due to varying VGB and VBS. We show two biasing techniques that alleviate these effects. The first technique always uses transistors with constant gateto-bulk voltage. The second technique uses a novel bulk-tosource biasing scheme to ensure zero bulk-to-source voltage. We propose a PMOS spatial filtering circuit that employs this scheme to extend the range of linearity of subthreshold resistive networks. Measured experimental results from a

• Type: Conference
• Year: 2005
• Where: ISCAS
• Authors: Keng Hoong Wee, Ji-Jon Sit, Rahul Sarpeshkar
• Keywords: Bulk-tosource Biasing Scheme, Classic Resistive Network, ISCAS 2005, Resistive Networks