Bridging functional heterogeneity in multicore architectures

Heterogeneous processors that mix big high performance cores with small low power cores promise excellent single– threaded performance coupled with high multi–threaded throughput and higher performance–per–watt. A significant portion of the commercial multicore heterogeneous processors are likely to have a common instruction set architecture(ISA). However, due to limited design resources and goals, each core is likely to contain ISA extensions not yet implemented in the other core. Therefore, such heterogeneous processors will have inherent functional asymmetry at the ISA level and face significant software challenges. This paper analyzes the software challenges to the operating system and the application layer software on a heterogeneous system with functional asymmetry, where the ISA of the small and big cores overlaps. We look at the widely deployed IntelR Architecture and propose solutions to the software challenges that arise when a heterogeneous processor is designed a...

• Type: Journal
• Year: 2011
• Where: SIGOPS
• Authors: Dheeraj Reddy, David A. Koufaty, Paul Brett, Scott Hahn
• Keywords: Hardware, Heterogeneous Processor, Multicore Heterogeneous Processors, SIGOPS 2011, Software