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DATE
1997
IEEE

Built-in self-test methodology for A/D converters

14 years 4 months ago
Built-in self-test methodology for A/D converters
A (partial) Built-In Self-Test (BIST) methodology is proposed for analog to digital (MD)converters. In this methodology the number of bits of the A/Dconverter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least signipcant bit (LSB) needs to be monitored and a “full”BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST technique.
R. de Vries, Taco Zwemstra, E. M. J. G. Bruls, Pau
Added 06 Aug 2010
Updated 06 Aug 2010
Type Conference
Year 1997
Where DATE
Authors R. de Vries, Taco Zwemstra, E. M. J. G. Bruls, Paul P. L. Regtien
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