Challenges in Embedded Memory Design and Test

Both the number of embedded memories, as well as the total embedded memory content in our chips is growing steadily. Time for chip designers, EDA makers, and test engineers to update their knowledge on memories. This Hot Topic paper provides an embedded tutorial on embedded memories, in terms of what is new and coming versus what is old and vanishing, and what are the associated design, test, and repair challenges related to using embedded memories. 1 The Ideal Memory - Yesterday, Today and Tomorrow Betty Prince – Memory Strategies International The concept of the ‘ideal’ memory has changed over the past thirty years from a few high-volume stand-alone standardized MOS memory part types, each with its own manufacturing technology, to embedded memories in CMOS logic processes to potential universal memory technology for use in numerous instances in multimillion transistor logic chips.

• Type: Conference
• Year: 2005
• Where: DATE
• Authors: Erik Jan Marinissen, Betty Prince, Doris Keitel-Schulz, Yervant Zorian
• Keywords: DATE 2005, Embedded Memories, Hardware, Standardized Mos Memory, Total Embedded Memory