Characterizing and modeling the behavior of context switch misses

One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very useful, context switching can introduce high performance overheads, with one of the primary reasons being the cache perturbation effect. Between the time a thread is switched out and when it resumes execution, parts of its working set in the cache may be perturbed by other interfering threads, leading to (context switch) cache misses to recover from the perturbation. The goal of this paper is to understand how cache parameters and application behavior influence the number of context switch misses the application suffers from. We characterize a previously-unreported type of context switch misses that occur as the artifact of the interaction of cache replacement policy and an application’s temporal reuse behavior. We characterize the behavior of these “reordered misses”for various applications, cache s...

• Type: Conference
• Year: 2008
• Where: IEEEPACT
• Authors: Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abdulaziz Eker
• Keywords: Cache, Context Switch Misses, Context Switching, Hardware, IEEEPACT 2008