On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus

Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The Cell Broadband Engine’s Element Interconnect Bus (EIB), with its four data rings and shared command bus for end-to-end control, supports twelve nodes—more than most mainstream on-chip networks, which makes it an interesting case study. As a first step toward understanding the design and performance of onchip networks implemented within the context of a commercial multicore chip, this paper analytically evaluates the EIB network using conventional latency and throughput characterization methods as well as using a recently proposed 5-tuple latency characterization model for on-chip networks. These are used to identify the end-to-end control component of the EIB (i.e., the shared command bus) as being the main bottleneck to achieving minimal, single-cycle latency and maximal 307.2 GB/sec raw effective bandwi...

• Type: Conference
• Year: 2007
• Where: NOCS
• Authors: Thomas William Ainsworth, Timothy Mark Pinkston
• Keywords: Computer Networks, End-to-end Control, NOCS 2007, On-chip Networks, Onchip Networks