Circuit Partitioning with Complex Resource Constraints in FPGAs

In this paper, we present an algorithm for circuit partitioning with complex resource constraints in large FPGAs. Traditional partitioning methods estimate the capacity of an FPGA device by counting the number of logic blocks, however this is not accurate with the increasing capacity and diverse resource types in the new FPGA architectures. We propose a network ow based method to optimally check whether a circuit or a sub-circuit is feasible for a set of available heterogeneous resources. The feasibility checking procedure is integrated in the FM-based algorithm for circuit partitioning. Incremental ow technique is employed for efcient implementation. Experimental results on the MCNC benchmark circuits show that our partitioning algorithm not only yields good results, but also is e cient. Our algorithm for partitioning with complex resource constraints is applicable for both multiple FPGA designs e.g. logic emulation systems and partitioning-based placement algorithms for a single lar...

• Type: Conference
• Year: 1998
• Where: FPGA
• Authors: Huiqun Liu, Kai Zhu, D. F. Wong
• Keywords: Circuit Partitioning, Complex Resource Constraints, FPGA, FPGA 1998