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37

PATMOS
2010
Springer

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225views Modeling and Simulation» more PATMOS 2010»

Clock Network Synthesis with Concurrent Gate Insertion

13 years 9 months ago

Clock Network Synthesis with Concurrent Gate Insertion

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Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham

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Modeling And Simulation | PATMOS 2010 |

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Added	14 Feb 2011
Updated	14 Feb 2011
Type	Journal
Year	2010
Where	PATMOS
Authors	Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham

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