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ISPAN
2000
IEEE

Comprehensive Evaluation of an Instruction Reissue Mechanism

14 years 3 months ago
Comprehensive Evaluation of an Instruction Reissue Mechanism
In this paper, we evaluate a mechanism to reissue instructions on the mispredicted speculation path. An instruction which is once dispatched to a functional unit during mispredicted speculation is issued again inside an instruction window. This scheme is called instruction reissue. We propose to extend register update unit to perform the instruction reissue. The instruction reissue is e ective for data dependence speculation, since instructions which are independent of a misspeculated instruction should not be squashed. From an experimental evaluation, we have con rmed that the instruction reissue using the proposed mechanism enhances processor performance without introducing any severe hardware overheads.
Toshinori Sato, Itsujiro Arita
Added 31 Jul 2010
Updated 31 Jul 2010
Type Conference
Year 2000
Where ISPAN
Authors Toshinori Sato, Itsujiro Arita
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