A computational reflection mechanism to support platform debugging in SystemC

System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity of electronics systems design, where complex SoCs composed of several modules integrated on the same chip have become very common. In this scenario, the exploration and verification of several architecture models early in the design flow has played an important role. This paper proposes a mechanism that relies on computational reflection to enable designers to interact, on the fly, with platform simulation models written in SystemC TLM. This allows them to monitor and change signals or even IP internal register values, thus injecting specific stimuli that guide the simulation flow through corner cases during platform debugging, which are usually hard to handle by standard techniques, thus improving functional coverage. The key advantages of our approach are that we do not require code instrumentation from th...

• Type: Conference
• Year: 2007
• Where: CODES
• Authors: Bruno Albertini, Sandro Rigo, Guido Araujo, Cristiano C. de Araujo, Edna Barros, Willians Azevedo
• Keywords: CODES 2007, Computational Reflection, Platform-based Design, Software Engineering, SystemC TLM