Sciweavers

MTDT
1999
IEEE

Computing in Memory Architectures for Digital Image Processing

14 years 3 months ago
Computing in Memory Architectures for Digital Image Processing
Continuing improvements in semiconductor fabrication density are enabling new classes of System-on-aChip architectures that combine extensive processing logic and high-density memory. Many of the capabilities of these new architectures can be custom tailored to the demands of real-time digital image processing. This paper evaluates several candidate designs, using the criteria of image processing performance, flexibility, manufacturability, and fabrication cost.
Luke Roth, Lee D. Coraor, David L. Landis, Paul T.
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1999
Where MTDT
Authors Luke Roth, Lee D. Coraor, David L. Landis, Paul T. Hulina, Scott Deno
Comments (0)