Cost-Efficient SHA Hardware Accelerators

Abstract--This paper presents a new set of techniques for hardware implementations of Secure Hash Algorithm (SHA) hash functions. These techniques consist mostly in operation rescheduling and hardware reutilization, therefore, significantly decreasing the

• Type: Journal
• Year: 2008
• Where: TVLSI
• Authors: Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
• Keywords: Hardware Implementations, Hardware Reutilization, Secure Hash Algorithm, TVLSI 2008