As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
Recently we proposed a new clocking scheme, injection-locked clocking (ILC), to combat deteriorating clock skew and jitter, and hence reduce power consumption in highperformance mi...
Lin Zhang, A. Carpenter, Berkehan Ciftcioglu, Alok...
Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an efficient ratio of performance to energy-c...
Thermal management is critical for integrated circuit (IC) design. With each new IC technology generation, feature sizes decrease, while operating speeds and package densities incr...
Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakr...
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors in...
John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S....
Abstract--A distributed on-chip decoupling capacitor network is proposed in this paper. A system of distributed on-chip decoupling capacitors is shown to provide an efficient solut...
Mikhail Popovich, Eby G. Friedman, Radu M. Secarea...
Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or place...
Mikhail Popovich, Michael Sotman, Avinoam Kolodny,...