Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor

Power line communications (PLC) using impulse ultra wideband (UWB) in a microprocessor had been proposed for ubiquitous access of internal nodes for test/debug purposes. In this paper, we present a data recovery block, which is a key component for the proposed system. The data recovery block uses a novel sensing scheme, in which the sensing circuit’s Power Supply Rejection Ratio (PSRR) is deliberately degraded. The proposed data recovery block was implemented in TSMC 0.18 µm CMOS process. Transient simulations indicate that our data recovery block can successfully recover data from a power line modulated with impulses with amplitude of about 90 mV and period of 300 ps. The proposed data recovery block consumes 2.8 mW when operating at a sampling rate of 1 GHz.

• Type: Conference
• Year: 2007
• Where: ISVLSI
• Authors: Rajesh Thirugnanam, Dong Sam Ha, T. M. Mak
• Keywords: Data Recovery Block, ISVLSI 2007, Power Line, Power Supply Rejection Ratio