Digital filter synthesis considering multiple adder graphs for a coefficient

—In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that can be maximally sharable with the remaining coefficients, while previous dependence-graph algorithms consider only one adder graph when implementing a coefficient. In addition, we propose an addition reordering technique to reduce the computational overhead of finding multiple adder graphs. By using the proposed technique, multiple adder graphs are efficiently generated from a seed adder graph obtained by using previous dependence-graph algorithms. Experimental results show that the proposed algorithm reduces the hardware cost of FIR filters by 23% and 3.4% on average compared to the Hartely and RAGn-hybrid algorithms.

• Type: Conference
• Year: 2008
• Where: ICCD
• Authors: Jeong-Ho Han, In-Cheol Park
• Keywords: Addition Reordering Technique, Hardware, ICCD 2008, Multiple Adder Graphs, Seed Adder Graph