DMA-aware memory energy management

As increasingly larger memories are used to bridge the widening gap between processor and disk speeds, main memory energy consumption is becoming increasingly dominant. Even though much prior research has been conducted on memory energy management, no study has focused on data servers, where main memory is predominantly accessed by DMAs instead of processors. In this paper, we study DMA-aware techniques for memory energy management in data servers. We first characterize the effect of DMA accesses on memory energy and show that, due to the mismatch between memory and I/O bus bandwidths, significant energy is wasted when memory is idle but still active during DMA transfers. To reduce this waste, we propose two novel performance-directed energy management techniques that maximize the utilization of memory devices by increasing the level of concurrency between multiple DMA transfers from different I/O buses to the same memory device. We evaluate our techniques using a detailed trace-drive...

• Type: Conference
• Year: 2006
• Where: HPCA
• Authors: Vivek Pandey, Weihang Jiang, Yuanyuan Zhou, Ricardo Bianchini
• Keywords: Computer Architecture, HPCA 2006, Idle Energy Waste, Main Memory Energy, Memory Energy Management