Dynamic Optimization of Micro-Operations

Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one or more micro-operations in order to deal with the complexity of the ISA. Since these micro-operations are not visible to the compiler, the stream of micro-operations can contain redundancies even in statically optimized x86 code. Within a processor implementation, however, barriers at the ISA level do not apply, and these redundancies can be removed by optimizing the micro-operation stream. In this paper, we explore the opportunities to optimize code at the micro-operation granularity. We execute these microoperation optimizations using the rePLay Framework as a microarchitectural substrate. Using a simple set of seven optimizations, including two that aggressively and speculatively attempt to remove redundant load instructions, we examine the effects of dynamic optimization of micro-operations using a trace-...

• Type: Conference
• Year: 2003
• Where: HPCA
• Authors: Brian Slechta, David Crowe, Brian Fahs, Michael Fertig, Gregory A. Muthler, Justin Quek, Francesco Spadini, Sanjay J. Patel, Steven Lumetta
• Keywords: Computer Architecture, HPCA 2003, Modern X86 Implementations, Optimizing RePLay Processor, Real X86 Applications