Dynamic task set partitioning based on balancing memory requirements to reduce power consumption

ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on reducing power consumption has become a hot research topic. Different ways to reduce power consumption consist on using processors that do not implement the most power-hungry microarchitectural mechanisms, attacking hot spots, or reducing consumption in the larger microprocessor components like the cache. Unlike these works which focus on specific parts of the microprocessor, Dynamic Voltage Scaling (DVS) is a technique which applies on the whole microprocessor die. This technique allows the system to work at different frequency/voltage levels. DVS costs in a multicore system can be reduced by sharing the same DVS regulator among the cores (global DVS). In this context, to handle energy efficiently, the workload must be properly balanced among the cores. In this paper we propose a new partitioning heuristic aimed...

• Type: Conference
• Year: 2009
• Where: ICS
• Authors: Diana Bautista, Julio Sahuquillo, Houcine Hassan, Salvador Petit, José Duato
• Keywords: DVS Regulator, Global Dvs, ICS 2009, Power Consumption