Efficient Selection of Vector Instructions Using Dynamic Programming

Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scientific, and embedded applications. To take full advantage of the vector capabilities, a compiler needs to generate efficient vector code automatically. However, most commercial and open-source compilers fall short of using the full potential of vector units, and only generate vector code for simple innermost loops. In this paper, we present the design and implementation of an auto-vectorization framework in the back-end of a dynamic compiler that not only generates optimized vector code but is also well integrated with the instruction scheduler and register allocator. The framework includes a novel compile-time efficient dynamic programming-based vector instruction selection algorithm for straight-line code that expands opportunities for vectorization in the following ways: (1) scalar packing explores opportun...

• Type: Journal
• Year: 2010
• Where: MICRO
• Authors: Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
• Keywords: Hardware, MICRO 2010, SIMD Vector Units, Vector Code, Vector Units