MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the ...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract--As multicore processors are deployed in mainstream computing, the need for software tools to help parallelize programs is increasing dramatically. Data-dependence profili...
MICRO
2010
IEEE
13 years 10 months ago
2010
IEEE
A particularly insidious type of concurrency bug is atomicity violations. While there has been substantial work on automatic detection of atomicity violations, each existing techn...
MICRO
2010
IEEE
13 years 10 months ago
2010
IEEE