Electrical and optical clock distribution networks for gigascale microprocessors

A summary of electrical and optical approaches to clock distribution within high-performance microprocessors is presented. System-level properties of intrachip electrical clock distribution networks corresponding to three microprocessor families are summarized. It is found that global clock interconnect performance and short-term jitter present the greatest challenges to the continued use of conventional clock distribution methodologies. An extrapolation of trends describing the percentage of clock period consumed by global skew and short-term jitter identifies the 32-nm technology generation of the 2002 International Technology Roadmap for Semiconductors (ITRS) as the first technology generation within which alternate methods of clock distribution may be warranted. Research efforts investigating interboard through intrachip optical clock distribution are also summarized. An optical distribution network compatible with high volume manufacturing in conjunction with a suitable means of p...

• Type: Journal
• Year: 2002
• Where: TVLSI
• Authors: A. V. Mule, Elias N. Glytsis, Thomas K. Gaylord, James D. Meindl
• Keywords: Clock Distribution, Electrical Clock Distribution, Optical Clock Distribution, TVLSI 2002