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JSA
2008

Energy reduction through crosstalk avoidance coding in networks on chip

14 years 12 days ago
Energy reduction through crosstalk avoidance coding in networks on chip
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near future. With this ever increasing degree of integration, design of communication architectures for large, multi-core SoCs is a challenge. Traditional bus-based systems will no longer be able to meet the clock cycle requirements of these big SoCs. Instead, the communication requirements of these large multi processor SoCs (MP-SoCs) are convened by the emerging network-on-chip (NoC) paradigm. Crosstalk between adjacent wires is an important signal integrity issue in NoC communication fabrics and it can cause timing violations and extra energy dissipation. Crosstalk avoidance codes (CACs) can be used to improve the signal integrity by reducing the effective coupling capacitance, lowering the energy dissipation of wire segments. As NoCs are built on packet-switching, it is advantageous to modify data packets by incl...
Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cri
Added 13 Dec 2010
Updated 13 Dec 2010
Type Journal
Year 2008
Where JSA
Authors Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cristian Grecu
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