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MR
2002

ESD protection design for CMOS RF integrated circuits using polysilicon diodes

13 years 10 months ago
ESD protection design for CMOS RF integrated circuits using polysilicon diodes
ESD protection design for CMOS RF integrated circuits is proposed in this paper by using the stacked polysilicon diodes as the input ESD protection devices to reduce the total input capacitance and to avoid the noise coupling from the common substrate. The ESD level of the stacked polysilicon diodes on the I/O pad is restored by using the turn-on efficient power-rail ESD clamp circuit, which is constructed by substrate-triggered technique. This polysilicon diode is fully process compatible to general sub-quarter-micron CMOS processes.
Ming-Dou Ker, Chyh-Yih Chang
Added 22 Dec 2010
Updated 22 Dec 2010
Type Journal
Year 2002
Where MR
Authors Ming-Dou Ker, Chyh-Yih Chang
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