Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures

The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system architecture for a specific application or domain, makes it critical for a designer to be aware of (and to evaluate) the trade-offs involved in selecting an optimal system-level communication architecture. While it is generally known that different communication architectures may be better suited to serve the needs of different applications, very little work has been done on quantitatively comparing and characterizing their performance for different classes of on-chip communication traffic. In this paper, we present a detailed analysis of the performance of various System-on-Chip communication architectures under different classes of on-chip communication traffic. We present high-level models of a few commonly used on-chip architectures, which take into account key architectural features, including their charac...

• Type: Conference
• Year: 2001
• Where: VLSID
• Authors: Kanishka Lahiri, Sujit Dey, Anand Raghunathan
• Keywords: Computer Architecture, On-Chip Communication Architecture, On-chip Communication Traffic, System-on-Chip Communication Architectures, VLSID 2001