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VLSID
2002
IEEE

Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts

15 years 24 days ago
Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts
Our target is automation of analog circuit's layout, which is a bottleneck in mixed-signal's design. We formulate the layout explicitly considering manufacturing process, and propose an algorithm that consists of simultaneous expression and optimization of placement and routing. The key is that all the cells and wires are represented by rectangles. The algorithm is combined into a commercial tool, and the performance convinced us that the utilization shortens the design time.
Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, M
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2002
Where VLSID
Authors Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, Masahiro Kawakita
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