Extremely Low-Power Logic

For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large logic blocks, interconnect becomes a main issue, that could be solved by onchip optical interconnect. Nano-devices will also be presented, as a possibility to compute with nearly zero power, and compared to future 10 nanometers transistors.

• Type: Conference
• Year: 2004
• Where: DATE
• Authors: Christian Piguet, Jacques Gautier, Christoph Heer, Ian O'Connor, Ulf Schlichtmann
• Keywords: DATE 2004, Hardware, Large Logic Blocks, Low-power Logic, Onchip Optical Interconnect