A faster implementation of APlace

APlace is a high quality, scalable analytical placer. This paper describes our recent efforts to improve APlace for speed and scalability. We explore various wirelength and density approximation functions. We speed up the placer using a hybrid usage of wirelength and density approximations during the course of multi-level placement, and obtain 2-2.5 times speedup of global placement on the IBM ISPD04 and ISPD05 benchmarks. Recent applications of the APlace framework to supply voltage degradation-aware placement and lens aberration-aware timing-driven placement are also briefly described. Categories and Subject Descriptors B.7.2 [Hardware]: INTEGRATED CIRCUITS—Design Aids; J.6 [Computer Applications]: COMPUTER-AIDED ENGINEERING General Terms Algorithms, Design, Performance Keywords Analytical Placement, Scalability, Supply Voltage Degradation, Lens Aberration

• Type: Conference
• Year: 2006
• Where: ISPD
• Authors: Andrew B. Kahng, Qinke Wang
• Keywords: Density Approximations, Hardware, ISPD 2006, Scalable Analytical Placer, Voltage Degradation-aware Placement