Flexible hardware reduction for elliptic curve cryptography in GF(2m)

In this paper we discuss two ways to provide flexible hardware support for the reduction step in Elliptic Curve Cryptography in binary fields (GF(2m )). In our first approach we are using several dedicated reduction units within a single multiplier. Our measurement results show that this simple approach leads to an additional area consumption of less than 10% compared to a dedicated design without performance penalties. In our second approach any elliptic curve cryptography up to a predefined maximal length can be supported. Here we take advantage of the features of commonly used reduction polynomials. Our results show a significant area penalty compared to dedicated designs. However, we achieve flexibility and the performance is still significantly better than those of known ECC hardware accelerator approaches with similar flexibility or even software implementations.

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Steffen Peter, Peter Langendörfer, Krzysztof Piotrowski
• Keywords: DATE 2007, Dedicated Designs, Dedicated Reduction Units, Elliptic Curve Cryptography, Hardware