A gate resizing technique for high reduction in power consumption

With the advent of portable and high density microelectronic devices, the power dissipation of VLSI circuits is becoming a critical concern. In this paper, we propose a post

• Type: Conference
• Year: 1997
• Where: ISLPED
• Authors: Patrick Girard, Christian Landrault, Serge Pravossoudovitch, D. Severac
• Keywords: Gate, Gate Resizing Solution, Hardware, ISLPED 1997, Power Dissipation