Globally Asynchronous Locally Synchronous FPGA Architectures

Abstract. Globally Asynchronous Locally Synchronous (GALS) Systems have provoked renewed interest over recent years as they have the potential to combine the benefits of asynchronous and synchronous design paradigms. It has been applied to ASICs, but not yet applied to FPGAs. In this paper we propose applying GALS techniques to FPGAs in order to overcome the limitation on timing imposed by slow routing.

• Type: Conference
• Year: 2003
• Where: FPL
• Authors: Andrew Royal, Peter Y. K. Cheung
• Keywords: Asynchronous, FPL 2003, GALS Techniques, Synchronous Design Paradigms