Going the Distance for TLB Prefetching: An Application-Driven Study

The importance of the Translation Lookaside Buffer (TLB) on system performance is well known. There have been numerous prior efforts addressing TLB design issues for cutting down access times and lowering miss rates. However, it was only recently that the first exploration [26] on prefetching TLB entries ahead of their need was undertaken and a mechanism called Recency Prefetching was proposed. There is a large body of literature on prefetching for caches, and it is not clear how they can be adapted (or if the issues are different) for TLBs, how well suited they are for TLB prefetching, and how they compare with the recency prefetching mechanism. This paper presents the first detailed comparison of different prefetching mechanisms (previously proposed for caches) - arbitrary stride prefetching, and markov prefetching - for TLB entries, and evaluates their pros and cons. In addition, this paper proposes a novel prefetching mechanism, called Distance Prefetching, that attempts to capt...

• Type: Conference
• Year: 2002
• Where: ISCA
• Authors: Gokul B. Kandiraju, Anand Sivasubramaniam
• Keywords: Efforts Addressing Tlb, Hardware, ISCA 2002, Mechanism Called Recency, TLB Entries