A Graph-Theoretic Approach to Clock Skew Optimization

This paper addresses the problem of minimizing the clock period of a circuit by optimizingthe clock skews. We incorporate uncertainty factors and present a formulation that ensures that the optimization will be safe. In 1 , the problem of clock period optimization is formulated as a linear program. We rst propose an e cient graph-based solution that takes advantage of the structure of the problem. We also show that the results of 1 may result in exceedingly large skews, and propose a method to reduce these skews without sacri cing the optimality of the clock period. Experimental results on several ISCAS89 benchmark circuits are provided.

• Type: Conference
• Year: 1994
• Where: ISCAS
• Authors: Rahul B. Deokar, Sachin S. Sapatnekar
• Keywords: Clock Period, Clock Period Optimization, Clock Skews, Hardware, ISCAS 1994