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TVLSI
2008

Guest Editorial Special Section on Design Verification and Validation

13 years 11 months ago
Guest Editorial Special Section on Design Verification and Validation
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approach for pipelined processors is presented in, "A refinement-based compositional reasoning framework for pipelined machine verification," by Manolios and Srinivasan. Well-founded equivalence bisimulation refinement is used to prove equivalence between an instruction set architecture and a machine architecture. The next two papers in this Special Section explore solutions to the equivalence checking problem using simulation rather than formal methods. The work presented in "Novel probabilistic combinational equivalence checking," by Wu et al., determines equivalence between two gate-level circuits by simulating the circuits with a weighted random pattern sequence and then comparing the output signal frequencies. It is possible that two non-equivalent circuits have the same output signal freque...
I. Harris, D. Pradhan
Added 16 Dec 2010
Updated 16 Dec 2010
Type Journal
Year 2008
Where TVLSI
Authors I. Harris, D. Pradhan
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