Hardware debugging method based on signal transitions and transactions

- This paper proposes a hardware design debugging method, Transition and Transaction Tracer (TTT), which probes and records the signals of interest for a long time, hours, days, or even weeks, without a break. It compresses the captured data in real time and stores it in a state transition format in memory. It can be programmed to generate a trigger for a logic analyzer when it detects certain transitions. The visualizer, which shows the captured data in the matrix, timing-chart, and state-transition diagram formats, helps the engineer effectively find bugs.

• Type: Conference
• Year: 2006
• Where: ASPDAC
• Authors: Nobuyuki Ohba, Kohji Takano
• Keywords: ASPDAC 2006, Captured Data, Design Debugging Method, Hardware, State Transition Format