Hardware-dependent software synthesis for many-core embedded systems

Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, developed at UC Irvine, for transaction level design of multicore embedded systems. HdS synthesis is a key component of ESE backend design flow. We follow a design process that starts with an application model consisting of C processes communicating ract message passing channels. The application model is mapped to a platform net-list of SW and HW cores, buses and buffers. A high speed transaction level model (TLM) is generated ate abstract communication between processes mapped to different cores. The TLM is further refined into a Pin-Cycle Accurate Model (PCAM) for board implementation. The PCAM includes C code for all the HdS layers including routing, packeting, synchronization and bus transfer. The generated HdS methods provide a library of application level services to the C processes on individual SW cores....

• Type: Conference
• Year: 2009
• Where: ASPDAC
• Authors: Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Lo Chi Yu Lo, Daniel Gajski
• Keywords: ASPDAC 2009, Generated Hds Methods, Hardware, HdS Synthesis, Low Level Hds