Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors

Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many important applications. Unfortunately, known techniques for run-time parallelization are often computationally expensive or not general enough. To address this problem, we propose new hardware support for e cient run-time parallelization in distributed shared-memory DSM multiprocessors. The idea is to execute the code in parallel speculatively and use extensions to the cache coherence protocol hardware to detect any dependence violations. As soon as a dependence is detected, execution stops, the state is restored, and the code is re-executed serially. This scheme, which we apply to loops, allows iterations to execute and complete in potentially any order. This scheme requires hardware extensions to the cache coherence protocol and memory hierarchy of a DSM. It has low overhead. In this paper, we present the algo...

• Type: Conference
• Year: 1998
• Where: HPCA
• Authors: Ye Zhang, Lawrence Rauchwerger, Josep Torrellas
• Keywords: Cache Coherence Protocol, Cient Run-time Parallelization, Distributed And Parallel Computing, HPCA 1998, Run-time Parallelization