Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications

In this paper, the program control unit of an embedded RISC processor is enhanced with a novel zerooverhead loop controller (ZOLC) supporting arbitrary loop structures with multiple-entry/exit nodes. The ZOLC has been incorporated to an open RISC processor core to evaluate the performance of the proposed unit for alternative configurations of the selected processor. It is proven that speed improvements of 8.4% to 48.2% are feasible for the used benchmarks.

• Type: Conference
• Year: 2005
• Where: DATE
• Authors: Nikolaos Kavvadias, Spiridon Nikolaidis
• Keywords: DATE 2005, Embedded Risc Processor, Hardware, RISC Processor, RISC Processor Core