High accurate pattern based precondition method for extremely large power/ground grid analysis

In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-chip power distribution networks. On top of this, a new precondition iterative method, which exploits geometry characters of power/ground networks, is developed to reduce memory usage and speed up the simulation. Experimental results show that the proposed method is about 5X faster than the incomplete LU decomposition (ILU) based preconditioned conjugate gradient iterative method and about half memory usage for simulating multi-layers large scale power/ground networks. Categories and Subject Descriptors B.7.2 [INTEGRATED CIRCUITS]: Design Aids; B.8.2 [Performance and Reliability]: Performance Analysis and Design Aids;

• Type: Conference
• Year: 2006
• Where: ISPD
• Authors: Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hong
• Keywords: Hardware, ISPD 2006, Iterative Method, Power/ground Networks, Precondition Iterative Method