This site uses cookies to deliver our services and to ensure you get the best experience. By continuing to use this site, you consent to our use of cookies and acknowledge that you have read and understand our Privacy Policy, Cookie Policy, and Terms
This paper reviews the current state of the art in highperformance reconfigurable computing (HPRC) from the perspective of EPCC, the high-performance computing centre at the University of Edinburgh. We look at architectural and programming trends and assess some of the challenges that HPRC needs to address in order to drive itself across the chasm from the optimistic early adopters to the pragmatic early majority.
Robert Baxter, Stephen Booth, Mark Bull, Geoff Caw