This paper describes a system for performing high precision IDDQ measurement of CMOS ICs having a large peak current during operation. Although the measurement rate is at a low speed of 200uS, the average current of up to 1A during operation may be accepted by improving the dynamic load regulation. This system is also applicable to conventional testing apparatus. This paper covers problems in IDDQ testing, solution for the problems, embodiment of each circuit, verification of the results, conclusion and future issues.