Implications of technology scaling on leakage reduction techniques

The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limits and benefits, in terms of the potential leakage reduction, performance penalty, and area and power overhead in 0.25um, 0.18um, and 0.07um technologies. HSPICE simulation results and estimations with various functional units and memory structures are presented to support a comprehensive analysis. Categories and Subject Descriptors B.7.1 [Types and Design Styles]: VLSI, Advanced technologies; General Terms Design, Experimentation. Keywords Leakage reduction, technology scaling, low power.

• Type: Conference
• Year: 2003
• Where: DAC
• Authors: Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
• Keywords: DAC 2003, Design Automation, Keywords Leakage Reduction, Potential Leakage Reduction, Run-time Leakage Reduction