An Implicit Method for Hazard-Free Two-Level Logic Minimization

None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic minimization, or to manual and automated circuit partitioning techniques. This paper introduces a new implicit 2-level logic minimizer, Impymin, which is able to solve very large multi-output hazard-free minimization problems exactly. The minimizer is based on a novel theoretical approach: it incorporates hazard-freedom constraints within a synchronous function by adding new variables. In particular, the generation of dynamichazard-free prime implicants is cast as a synchronous prime implicant generation problem. The minimizer can exactly solve all currently available examples, which range up to 32 inputs and 33 outputs, in less than 813 seconds. These include examples that have never been exactly solved before.

• Type: Conference
• Year: 1998
• Where: ASYNC
• Authors: Michael Theobald, Steven M. Nowick
• Keywords: 2-level Logic Minimizer, ASYNC 1998, Hardware, Hazard-free Logic Minimization, Multi-output Hazard-free Minimization