Incorporating graceful degradation into embedded system design

In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of the applications depending on the fault, an approach is presented that optimizes the systems structure and behavior with respect to a possible graceful degradation. It includes a degradationaware reliability analysis that guides the optimization of the resource allocation and function distribution, and provides datastructures for an efficient online degradation algorithm. Thus, the proposed methodology covers both, the design phase with a structural optimization and the online phase with a behavioral optimization of the system. A case study shows the effectiveness of the proposed approach.

• Type: Conference
• Year: 2009
• Where: DATE
• Authors: Michael Glaß, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich
• Keywords: DATE 2009, Degradationaware Reliability Analysis, Hardware, Online Degradation Algorithm, Possible Graceful Degradation