Incremental capacitance extraction and its application to iterative timing-driven detailed routing

In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets or nets with timing violation in an aggressive way. A rip-up and reroute approach is employed to generate the alternate routes. The optimal route which satisfies the timing constraints is chosen. The net delays are calculated using the Elmore delay model. The coupling capacitances are computed using a 3D extractor by applying the process parameters. In such an approach, the interconnect delay can be most accurately modeled. However, this aggressive approach is likely to be computationally unaffordable, because the delay of each alternate route should be evaluated. To overcome this problem, the key is to efficiently handle the detailed 3-D extraction in each iteration step. In our approach, we represent the design changes in an incremental way. Then we compute the coupling capacitance using the incremental e...

• Type: Conference
• Year: 1999
• Where: ISPD
• Authors: Yanhong Yuan, Prithviraj Banerjee
• Keywords: Alternate Route, Coupling Capacitance, Elmore Delay Model, Hardware, ISPD 1999