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CATA
2004

The Instruction Execution Mechanism for Responsive Multithreaded Processor

14 years 1 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is controlled by using priority in RMT Processor. The highest priority thread is executed first in RMT Processor. Real-time applications, such as soft real-time processing including multimedia processing, require high computing performance. So we design the vector processing unit. Since multiple threads are executed in parallel by the multithreading architecture, these threads execute vector operations in parallel. We design the vector processing unit so that multiple threads are able to share vector registers and execute vector operations efficiently. Moreover, we design a vector compound execution mechanism to improve the performance of vector operations.
Tstomu Itou, Nobuyuki Yamasaki
Added 30 Oct 2010
Updated 30 Oct 2010
Type Conference
Year 2004
Where CATA
Authors Tstomu Itou, Nobuyuki Yamasaki
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